Active pixel arrays normally consist of a photodetector which along with Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) transistors, capacitors and, if need be, resistors form the opto-sensitive device. Most of the area of the pixel circuit is occupied by the photodetector and the capacitor, which serves to integrate the photo-generated current received from the photodetector. The integrated capacitors can consist of one or more detached plates with a dielectric disposed in between. Often times, the capacitor plates are in the Complementary Metal-Oxide-Semiconductor (CMOS) technology and manufactured from metal or polysilicon layers. Such structures are normally stacked up on a substrate.
For high capacitance requirements, a corresponding capacitor area is usually reserved on the substrate. In the case of active pixel-arrays, high capacitor area leads to a low fill factor and correspondingly large devices in each pixel. This can in turn not only increase the fabrication costs, but also limit the sensor properties, as the devices inside the pixel cannot be sized optimally. On the one hand, by reducing the size of the photodiode, the pixel sensitivity will be correspondingly reduced, as fewer photons are captured. On the other hand, by reducing the capacitor area, its capacitance will be accordingly lowered, limiting integration capabilities, which can subsequently dramatically increase the data evaluation efforts.